feat: add TX/RX pin state management and initialize pins correctly

This commit is contained in:
2025-08-08 11:28:12 +08:00
parent 0bdd03aedc
commit 92130d4a7a

View File

@ -621,6 +621,32 @@ inline Result<Unit, error_t> set_rx(const uint32_t timeout = RADIOLIB_SX126X_RX_
return spi::write_stream(RADIOLIB_SX126X_CMD_SET_RX, data); return spi::write_stream(RADIOLIB_SX126X_CMD_SET_RX, data);
} }
enum class TxRxPinState {
TX,
RX,
};
static constexpr auto tx_rx_en_pin_set = [](TxRxPinState state) {
constexpr auto TX_EN_PIN = app::driver::llcc68::TX_EN_PIN;
constexpr auto RX_EN_PIN = app::driver::llcc68::RX_EN_PIN;
if (TX_EN_PIN == GPIO_NUM_NC or RX_EN_PIN == GPIO_NUM_NC) {
return;
}
switch (state) {
case TxRxPinState::TX:
ESP_ERROR_CHECK(gpio_set_level(TX_EN_PIN, true));
ESP_ERROR_CHECK(gpio_set_level(RX_EN_PIN, false));
break;
case TxRxPinState::RX:
ESP_ERROR_CHECK(gpio_set_level(TX_EN_PIN, false));
ESP_ERROR_CHECK(gpio_set_level(RX_EN_PIN, true));
break;
}
};
enum class CAD_EXIT_MODE : uint8_t { enum class CAD_EXIT_MODE : uint8_t {
CAD_ONLY = 0x00, CAD_ONLY = 0x00,
CAD_RX = 0x01, CAD_RX = 0x01,
@ -1072,6 +1098,8 @@ kick_inf_rx(const modulation_params_t &mod_params, const packet_params_t &packet
APP_RADIO_RETURN_ERR_CTX(res, "clear irq status"); APP_RADIO_RETURN_ERR_CTX(res, "clear irq status");
res = set_rx(RADIOLIB_SX126X_RX_TIMEOUT_INF); res = set_rx(RADIOLIB_SX126X_RX_TIMEOUT_INF);
APP_RADIO_RETURN_ERR_CTX(res, "set rx"); APP_RADIO_RETURN_ERR_CTX(res, "set rx");
tx_rx_en_pin_set(TxRxPinState::RX);
return {}; return {};
} }
@ -1152,6 +1180,8 @@ async_transmit(const std::span<const uint8_t> data,
clear_irq_status(irq_mask); clear_irq_status(irq_mask);
APP_RADIO_RETURN_ERR_CTX(res, "clear irq status"); APP_RADIO_RETURN_ERR_CTX(res, "clear irq status");
tx_rx_en_pin_set(TxRxPinState::TX);
res = set_tx(); res = set_tx();
APP_RADIO_RETURN_ERR_CTX(res, "set tx"); APP_RADIO_RETURN_ERR_CTX(res, "set tx");
@ -1175,7 +1205,7 @@ async_transmit(const std::span<const uint8_t> data,
* @brief initialize TX & RX enable pins and put them in high level * @brief initialize TX & RX enable pins and put them in high level
* @note I'm not sure if this is necessary anymore, just in case * @note I'm not sure if this is necessary anymore, just in case
*/ */
static constexpr auto init_tx_rx_en = [] { static constexpr auto init_tx_rx_en_pin = [] {
constexpr auto TX_EN_PIN = app::driver::llcc68::TX_EN_PIN; constexpr auto TX_EN_PIN = app::driver::llcc68::TX_EN_PIN;
constexpr auto RX_EN_PIN = app::driver::llcc68::RX_EN_PIN; constexpr auto RX_EN_PIN = app::driver::llcc68::RX_EN_PIN;
@ -1192,10 +1222,11 @@ static constexpr auto init_tx_rx_en = [] {
.intr_type = GPIO_INTR_DISABLE, .intr_type = GPIO_INTR_DISABLE,
}; };
ESP_ERROR_CHECK(gpio_config(&io_conf)); ESP_ERROR_CHECK(gpio_config(&io_conf));
ESP_ERROR_CHECK(gpio_set_level(TX_EN_PIN, true)); ESP_ERROR_CHECK(gpio_set_level(TX_EN_PIN, false));
ESP_ERROR_CHECK(gpio_set_level(RX_EN_PIN, true)); ESP_ERROR_CHECK(gpio_set_level(RX_EN_PIN, false));
}; };
static constexpr auto init_pins = [](void (*isr)(void *), void *arg) { static constexpr auto init_pins = [](void (*isr)(void *), void *arg) {
if (RST_PIN != GPIO_NUM_NC) { if (RST_PIN != GPIO_NUM_NC) {
gpio::set_mode(RST_PIN, gpio::Mode::OUTPUT); gpio::set_mode(RST_PIN, gpio::Mode::OUTPUT);
@ -1224,8 +1255,8 @@ static constexpr auto init_pins = [](void (*isr)(void *), void *arg) {
ESP_ERROR_CHECK(gpio_isr_handler_add(pin, isr, arg)); ESP_ERROR_CHECK(gpio_isr_handler_add(pin, isr, arg));
} }
} }
// initialize TX & RX enable pins
init_tx_rx_en(); init_tx_rx_en_pin();
}; };
inline Result<Unit, error_t> get_device_error_print_and_clear(const char *tag) { inline Result<Unit, error_t> get_device_error_print_and_clear(const char *tag) {