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7 Commits

Author SHA1 Message Date
crosstyan e6f96ea0e3 fix(llcc68): cache detected chip type
Store the detected chip type after the first successful version-register read so repeated radio operations do not keep querying the chip identity.

This preserves Unknown as uncached so transient read failures or unsupported responses can still be retried on a later call.
2026-06-16 19:36:45 +08:00
crosstyan b125dd33b9 style(llcc68): apply shared clang-format
Add a .clang-format file to the LLCC68 submodule so it can be formatted consistently when edited or checked out independently from the parent repository.

Reformat the tracked C and C++ driver sources with the shared style configuration.
2026-06-16 19:36:45 +08:00
crosstyan d382bdfd1e fix(llcc68): apply full radio profile before tx and rx
Reapply packet type, sync word, RF frequency, modulation, packet, CRC, and whitening settings on async TX/RX entry points.

This lets callers switch between preconfigured profiles immediately before a send or listen operation instead of relying on modem-init state.
2026-06-16 19:35:59 +08:00
crosstyan efc6e17ed0 fix(llcc68): align spi binding with zephyr
Add a module-local .gitignore entry for macOS .DS_Store artifacts so generated Finder metadata does not dirty the submodule.

Declare the SPI chip-select delay binding properties as integers so Zephyr devicetree validation accepts the custom LLCC68 binding.

Pass the configured setup delay into SPI_DT_SPEC_INST_GET using the Zephyr 4 three-argument API, converting the nanosecond devicetree value to the microsecond spi_cs_control delay field.
2026-06-02 10:40:17 +08:00
crosstyan 1c3626d58b feat(llcc68): add configurable RF switch modes
Add an explicit rf-switch-mode devicetree property for LLCC68 instances, covering no switch handling, TXEN/RXEN complementary GPIO control, and DIO2 single-pin control for PE4259-style RF switches. Preserve the existing default behavior with an auto Kconfig default that only enables complementary GPIO handling when both TXEN and RXEN GPIOs are present.

Resolve the RF switch mode into llcc68_config at build time and validate incompatible devicetree combinations with BUILD_ASSERT checks. Configure optional RXEN GPIO handling for DIO2 single-pin mode and keep DIO2 RF switch control disabled unless that mode is selected.

Replace the old fire-and-forget TX/RX GPIO helper with a result-returning mode-aware RF switch state helper, and apply it across standby, sleep, CAD, TX, RX, continuous wave, infinite preamble, and modem init paths.

Add SetRxDutyCycle support with explicit raw 24-bit LLCC68 period units, plus helpers and a millisecond wrapper for callers that work in time units. Select the RX RF path before issuing the duty-cycle command so RXEN stays valid for duty-cycle listen windows.
2026-06-01 18:05:31 +08:00
crosstyan 4fb41a3211 feat(llcc68): honor directional TX settings
Apply the SX126x IQ config register fix after each LoRa packet parameter update so standard and inverted IQ changes take effect.

Reapply TX power settings in LoRa and GFSK async flush paths so a TX profile can differ from the RX/init profile.
2026-05-29 19:40:56 +08:00
crosstyan d4709da971 fix(llcc68): encode LoRa packet params in datasheet order
Program SetPacketParams as preamble, header type, payload length, CRC type, and IQ type.

The previous order swapped packet fields, which made gateway LoRa TX frames decode as corrupted fixed-length payloads on the CH32 LLCC68 receiver.
2026-05-29 19:40:55 +08:00
9 changed files with 2344 additions and 2004 deletions
+25
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@@ -0,0 +1,25 @@
# C++ specific configuration (akin to Google's C++ style)
# https://clang.llvm.org/docs/ClangFormatStyleOptions.html#adding-additional-style-options
---
Language: Cpp
BasedOnStyle: LLVM
UseTab: ForContinuationAndIndentation
IndentWidth: 4
TabWidth: 4
AccessModifierOffset: -4
ColumnLimit: 0
NamespaceIndentation: Inner
FixNamespaceComments: false
AllowShortIfStatementsOnASingleLine: WithoutElse
AllowShortLoopsOnASingleLine: true
AllowShortBlocksOnASingleLine: Empty
IndentCaseLabels: false
SortIncludes: Never
AlignConsecutiveMacros: AcrossEmptyLines
AlignConsecutiveAssignments: Consecutive
BreakStringLiterals: true
LineEnding: LF
MaxEmptyLinesToKeep: 2
BreakBeforeBraces: Attach
InsertBraces: true
BreakAfterAttributes: Always
+1
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@@ -0,0 +1 @@
.DS_Store
+34 -2
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@@ -1,9 +1,9 @@
DT_COMPAT_SEMTECH_LLCC68 := "semtech,llcc68" DT_COMPAT_SEMTECH_LLCC68_WEIHUA := "semtech,llcc68-weihua"
config LLCC68 config LLCC68
bool "Semtech LLCC68 LoRa Radio Driver" bool "Semtech LLCC68 LoRa Radio Driver"
depends on SPI && GPIO depends on SPI && GPIO
default $(dt_compat_enabled,$(DT_COMPAT_SEMTECH_LLCC68)) default $(dt_compat_enabled,$(DT_COMPAT_SEMTECH_LLCC68_WEIHUA))
help help
Enable the Semtech LLCC68 LoRa Radio Driver. Enable the Semtech LLCC68 LoRa Radio Driver.
@@ -32,6 +32,38 @@ config LLCC68_ALWAYS_USE_SX1262_HIGH_PA
When enabled, the LLCC68/SX1262/SX1261 driver always chooses high When enabled, the LLCC68/SX1262/SX1261 driver always chooses high
power amplifier settings instead of selecting them from chip version. power amplifier settings instead of selecting them from chip version.
choice LLCC68_RF_SWITCH_DEFAULT
prompt "Default LLCC68 RF switch mode"
default LLCC68_RF_SWITCH_DEFAULT_AUTO
help
Default RF switch mode for LLCC68 devicetree nodes that do not set
rf-switch-mode.
config LLCC68_RF_SWITCH_DEFAULT_AUTO
bool "Auto"
help
Preserve legacy behavior: use complementary GPIO control when both
tx-enable-gpios and rx-enable-gpios are present, otherwise disable RF
switch control.
config LLCC68_RF_SWITCH_DEFAULT_NONE
bool "None"
help
Disable RF switch control unless rf-switch-mode is set in devicetree.
config LLCC68_RF_SWITCH_DEFAULT_GPIO_COMPLEMENTARY
bool "TXEN/RXEN complementary GPIO"
help
Use MCU GPIOs for complementary TXEN/RXEN RF switch control by default.
config LLCC68_RF_SWITCH_DEFAULT_DIO2_SINGLE
bool "DIO2 single-pin"
help
Use LLCC68 DIO2 RF switch control by default. DIO2 drives TXEN, while
RXEN is held active externally or by rx-enable-gpios.
endchoice
module = LLCC68 module = LLCC68
module-str = llcc68 module-str = llcc68
+62 -20
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@@ -1,10 +1,34 @@
#include "llcc68_raw.h" #include "llcc68_raw.h"
#include <errno.h> #include <errno.h>
#include <zephyr/devicetree.h>
#include <zephyr/sys_clock.h>
#include <zephyr/sys/util.h> #include <zephyr/sys/util.h>
#define DT_DRV_COMPAT semtech_llcc68_weihua #define DT_DRV_COMPAT semtech_llcc68_weihua
#define LLCC68_AUTO_RF_SWITCH_MODE(inst) \
COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, tx_enable_gpios), \
(COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, rx_enable_gpios), \
(LLCC68_RF_SWITCH_GPIO_COMPLEMENTARY), (LLCC68_RF_SWITCH_NONE))), \
(LLCC68_RF_SWITCH_NONE))
#if defined(CONFIG_LLCC68_RF_SWITCH_DEFAULT_GPIO_COMPLEMENTARY)
#define LLCC68_DEFAULT_RF_SWITCH_MODE(inst) LLCC68_RF_SWITCH_GPIO_COMPLEMENTARY
#elif defined(CONFIG_LLCC68_RF_SWITCH_DEFAULT_DIO2_SINGLE)
#define LLCC68_DEFAULT_RF_SWITCH_MODE(inst) LLCC68_RF_SWITCH_DIO2_SINGLE
#elif defined(CONFIG_LLCC68_RF_SWITCH_DEFAULT_NONE)
#define LLCC68_DEFAULT_RF_SWITCH_MODE(inst) LLCC68_RF_SWITCH_NONE
#else
#define LLCC68_DEFAULT_RF_SWITCH_MODE(inst) LLCC68_AUTO_RF_SWITCH_MODE(inst)
#endif
#define LLCC68_RF_SWITCH_MODE(inst) \
DT_ENUM_IDX_OR(DT_DRV_INST(inst), rf_switch_mode, LLCC68_DEFAULT_RF_SWITCH_MODE(inst))
#define LLCC68_SPI_CS_DELAY_US(inst) \
DIV_ROUND_UP(DT_INST_PROP(inst, spi_cs_setup_delay_ns), NSEC_PER_USEC)
static void dio1_irq_trampoline(const struct device *port, struct gpio_callback *cb, uint32_t pins) { static void dio1_irq_trampoline(const struct device *port, struct gpio_callback *cb, uint32_t pins) {
ARG_UNUSED(port); ARG_UNUSED(port);
@@ -20,14 +44,21 @@ int llcc68_init(const struct device *dev) {
const struct llcc68_config *config = dev->config; const struct llcc68_config *config = dev->config;
struct llcc68_data *data = dev->data; struct llcc68_data *data = dev->data;
if (config->tx_enable_gpio.port != NULL) { if (config->rf_switch_mode == LLCC68_RF_SWITCH_GPIO_COMPLEMENTARY &&
config->tx_enable_gpio.port != NULL) {
gpio_pin_configure_dt(&config->tx_enable_gpio, GPIO_OUTPUT_INACTIVE); gpio_pin_configure_dt(&config->tx_enable_gpio, GPIO_OUTPUT_INACTIVE);
} }
if (config->rx_enable_gpio.port != NULL) { if (config->rf_switch_mode == LLCC68_RF_SWITCH_GPIO_COMPLEMENTARY &&
config->rx_enable_gpio.port != NULL) {
gpio_pin_configure_dt(&config->rx_enable_gpio, GPIO_OUTPUT_INACTIVE); gpio_pin_configure_dt(&config->rx_enable_gpio, GPIO_OUTPUT_INACTIVE);
} }
if (config->rf_switch_mode == LLCC68_RF_SWITCH_DIO2_SINGLE &&
config->rx_enable_gpio.port != NULL) {
gpio_pin_configure_dt(&config->rx_enable_gpio, GPIO_OUTPUT_ACTIVE);
}
gpio_pin_configure_dt(&config->reset_gpio, GPIO_OUTPUT_INACTIVE); gpio_pin_configure_dt(&config->reset_gpio, GPIO_OUTPUT_INACTIVE);
gpio_pin_configure_dt(&config->busy_gpio, GPIO_INPUT); gpio_pin_configure_dt(&config->busy_gpio, GPIO_INPUT);
gpio_pin_configure_dt(&config->dio1_gpio, GPIO_INPUT); gpio_pin_configure_dt(&config->dio1_gpio, GPIO_INPUT);
@@ -42,24 +73,35 @@ int llcc68_init(const struct device *dev) {
return 0; return 0;
} }
#define LLCC68_DEFINE(inst) \ #define LLCC68_DEFINE(inst) \
static struct llcc68_data llcc68_data_##inst; \ BUILD_ASSERT(LLCC68_RF_SWITCH_MODE(inst) != LLCC68_RF_SWITCH_GPIO_COMPLEMENTARY || \
static const struct llcc68_config llcc68_config_##inst = \ (DT_INST_NODE_HAS_PROP(inst, tx_enable_gpios) && \
{ \ DT_INST_NODE_HAS_PROP(inst, rx_enable_gpios)), \
.spi = SPI_DT_SPEC_INST_GET(inst, SPI_WORD_SET(8) | SPI_TRANSFER_MSB), \ "LLCC68 gpio-complementary RF switch mode requires tx-enable-gpios " \
.reset_gpio = GPIO_DT_SPEC_INST_GET(inst, reset_gpios), \ "and rx-enable-gpios"); \
.busy_gpio = GPIO_DT_SPEC_INST_GET(inst, busy_gpios), \ BUILD_ASSERT(LLCC68_RF_SWITCH_MODE(inst) != LLCC68_RF_SWITCH_DIO2_SINGLE || \
.dio1_gpio = GPIO_DT_SPEC_INST_GET(inst, dio1_gpios), \ !DT_INST_NODE_HAS_PROP(inst, tx_enable_gpios), \
.tx_enable_gpio = GPIO_DT_SPEC_INST_GET_OR(inst, tx_enable_gpios, {.port = NULL}), \ "LLCC68 dio2-single RF switch mode uses DIO2 for TXEN and must not " \
.rx_enable_gpio = GPIO_DT_SPEC_INST_GET_OR(inst, rx_enable_gpios, {.port = NULL}), \ "define tx-enable-gpios"); \
}; \ static struct llcc68_data llcc68_data_##inst; \
DEVICE_DT_INST_DEFINE(inst, \ static const struct llcc68_config llcc68_config_##inst = \
llcc68_init, \ { \
NULL, \ .spi = SPI_DT_SPEC_INST_GET( \
&llcc68_data_##inst, \ inst, SPI_WORD_SET(8) | SPI_TRANSFER_MSB, LLCC68_SPI_CS_DELAY_US(inst)), \
&llcc68_config_##inst, \ .reset_gpio = GPIO_DT_SPEC_INST_GET(inst, reset_gpios), \
POST_KERNEL, \ .busy_gpio = GPIO_DT_SPEC_INST_GET(inst, busy_gpios), \
CONFIG_LLCC68_INIT_PRIORITY, \ .dio1_gpio = GPIO_DT_SPEC_INST_GET(inst, dio1_gpios), \
.tx_enable_gpio = GPIO_DT_SPEC_INST_GET_OR(inst, tx_enable_gpios, {.port = NULL}), \
.rx_enable_gpio = GPIO_DT_SPEC_INST_GET_OR(inst, rx_enable_gpios, {.port = NULL}), \
.rf_switch_mode = LLCC68_RF_SWITCH_MODE(inst), \
}; \
DEVICE_DT_INST_DEFINE(inst, \
llcc68_init, \
NULL, \
&llcc68_data_##inst, \
&llcc68_config_##inst, \
POST_KERNEL, \
CONFIG_LLCC68_INIT_PRIORITY, \
NULL) NULL)
BUILD_ASSERT(DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT), BUILD_ASSERT(DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT),
+24
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@@ -48,8 +48,32 @@ properties:
Antenna switch RX enable GPIO. If set, the driver tracks the Antenna switch RX enable GPIO. If set, the driver tracks the
state of the radio and controls the RF switch. state of the radio and controls the RF switch.
rf-switch-mode:
type: string
enum:
- "none"
- "gpio-complementary"
- "dio2-single"
description: |
Optional RF switch control mode.
"none" disables RF switch handling.
"gpio-complementary" controls TXEN/RXEN from MCU GPIOs using the
complementary table:
idle: TXEN=0, RXEN=0
RX: TXEN=0, RXEN=1
TX: TXEN=1, RXEN=0
This mode requires tx-enable-gpios and rx-enable-gpios.
"dio2-single" enables LLCC68 DIO2-as-RF-switch control for TXEN.
RXEN must be externally pulled active or supplied as rx-enable-gpios,
which the driver holds active. This mode must not use tx-enable-gpios.
spi-cs-setup-delay-ns: spi-cs-setup-delay-ns:
type: int
default: 100000 default: 100000
spi-cs-hold-delay-ns: spi-cs-hold-delay-ns:
type: int
default: 100000 default: 100000
+21 -5
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@@ -44,10 +44,10 @@ constexpr auto DEFAULT_BUSY_TIMEOUT_MS = 100;
* @param ldro_on Low data rate optimization setting sent to the radio * @param ldro_on Low data rate optimization setting sent to the radio
*/ */
constexpr airtime_t calc_time_on_air(uint8_t len, uint8_t sf, LoRaBandwidth bw, constexpr airtime_t calc_time_on_air(uint8_t len, uint8_t sf, LoRaBandwidth bw,
LoRaCodingRate cr, LoRaCodingRate cr,
uint16_t preamble_length, uint16_t preamble_length,
LoRaHeaderType header_type, LoRaHeaderType header_type,
LoRaCrcType crc_type, bool ldro_on); LoRaCrcType crc_type, bool ldro_on);
struct LLCC68 { struct LLCC68 {
/** trivial getter */ /** trivial getter */
@@ -120,7 +120,7 @@ struct LLCC68 {
uint8_t offset, std::span<const uint8_t> data_from_host, uint8_t offset, std::span<const uint8_t> data_from_host,
timeout_ms_t busy_timeout = DEFAULT_BUSY_TIMEOUT_MS); timeout_ms_t busy_timeout = DEFAULT_BUSY_TIMEOUT_MS);
void tx_rx_en_pin_set(TxRxPinState state); expected<unit, error_code> set_rf_switch_state(RfSwitchState state);
/** LLCC68 DataSheet Function */ /** LLCC68 DataSheet Function */
@@ -239,6 +239,21 @@ struct LLCC68 {
expected<unit, error_code> set_tx(uint32_t timeout = TIMEOUT_NONE); expected<unit, error_code> set_tx(uint32_t timeout = TIMEOUT_NONE);
expected<unit, error_code> set_rx(uint32_t timeout = TIMEOUT_INF); expected<unit, error_code> set_rx(uint32_t timeout = TIMEOUT_INF);
/**
* @brief Start LLCC68 RX duty-cycle/listen mode.
*
* rx_period and sleep_period are raw 24-bit LLCC68 RTC periods, not
* milliseconds. Datasheet section 13.1.7 defines one period as 15.625 us:
* RX duration = rx_period * 15.625 us
* sleep duration = sleep_period * 15.625 us
*
* Use rx_duty_cycle_period_from_ms() or set_rx_duty_cycle_ms() when caller
* inputs are in milliseconds.
*/
expected<unit, error_code> set_rx_duty_cycle(uint32_t rx_period,
uint32_t sleep_period);
expected<unit, error_code> set_rx_duty_cycle_ms(uint32_t rx_period_ms,
uint32_t sleep_period_ms);
expected<unit, error_code> set_sleep(sleep_config_t config); expected<unit, error_code> set_sleep(sleep_config_t config);
expected<unit, error_code> set_tx_continuous_wave(); expected<unit, error_code> set_tx_continuous_wave();
expected<unit, error_code> set_tx_infinite_preamble(); expected<unit, error_code> set_tx_infinite_preamble();
@@ -288,6 +303,7 @@ struct LLCC68 {
/** properties */ /** properties */
const struct device *dev; const struct device *dev;
std::optional<ChipType> cached_chip_type{};
}; };
} // namespace app::driver::llcc68 } // namespace app::driver::llcc68
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+7
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@@ -14,6 +14,12 @@ extern "C" {
typedef void (*llcc68_user_dio1_handler_t)(const struct device *dev, void *user_data); typedef void (*llcc68_user_dio1_handler_t)(const struct device *dev, void *user_data);
enum llcc68_rf_switch_mode {
LLCC68_RF_SWITCH_NONE = 0,
LLCC68_RF_SWITCH_GPIO_COMPLEMENTARY = 1,
LLCC68_RF_SWITCH_DIO2_SINGLE = 2,
};
struct llcc68_config { struct llcc68_config {
struct spi_dt_spec spi; struct spi_dt_spec spi;
struct gpio_dt_spec reset_gpio; struct gpio_dt_spec reset_gpio;
@@ -21,6 +27,7 @@ struct llcc68_config {
struct gpio_dt_spec dio1_gpio; struct gpio_dt_spec dio1_gpio;
struct gpio_dt_spec tx_enable_gpio; struct gpio_dt_spec tx_enable_gpio;
struct gpio_dt_spec rx_enable_gpio; struct gpio_dt_spec rx_enable_gpio;
enum llcc68_rf_switch_mode rf_switch_mode;
}; };
struct llcc68_data { struct llcc68_data {
+1325 -1170
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