Add an explicit rf-switch-mode devicetree property for LLCC68 instances, covering no switch handling, TXEN/RXEN complementary GPIO control, and DIO2 single-pin control for PE4259-style RF switches. Preserve the existing default behavior with an auto Kconfig default that only enables complementary GPIO handling when both TXEN and RXEN GPIOs are present.
Resolve the RF switch mode into llcc68_config at build time and validate incompatible devicetree combinations with BUILD_ASSERT checks. Configure optional RXEN GPIO handling for DIO2 single-pin mode and keep DIO2 RF switch control disabled unless that mode is selected.
Replace the old fire-and-forget TX/RX GPIO helper with a result-returning mode-aware RF switch state helper, and apply it across standby, sleep, CAD, TX, RX, continuous wave, infinite preamble, and modem init paths.
Add SetRxDutyCycle support with explicit raw 24-bit LLCC68 period units, plus helpers and a millisecond wrapper for callers that work in time units. Select the RX RF path before issuing the duty-cycle command so RXEN stays valid for duty-cycle listen windows.
Apply the SX126x IQ config register fix after each LoRa packet parameter update so standard and inverted IQ changes take effect.
Reapply TX power settings in LoRa and GFSK async flush paths so a TX profile can differ from the RX/init profile.
Program SetPacketParams as preamble, header type, payload length, CRC type, and IQ type.
The previous order swapped packet fields, which made gateway LoRa TX frames decode as corrupted fixed-length payloads on the CH32 LLCC68 receiver.
Calculate LoRa airtime from the exact LDRO value supplied to SetModulationParams instead of inferring it from symbol time.
Keep transmit_result airtime in microseconds for both LoRa and GFSK, using integer Hz math and 64-bit ceil division to avoid truncation errors.
Reapply modulation parameters during async TX flush so the estimator and the bytes sent to the radio stay in sync, and add a compile-time check for the intended SF7/BW125 implicit 6-byte airtime.
Zephyr deprecates passing the chip-select delay as the variadic delay argument to SPI_DT_SPEC_INST_GET. Remove that deprecated macro argument from the raw LLCC68 device initializer.
Add spi-cs-setup-delay-ns and spi-cs-hold-delay-ns defaults to the custom LLCC68 devicetree binding. Both defaults are 100000 ns, preserving the previous 100 us delay behavior while using the current Zephyr SPI devicetree properties.
Verified with cmake -S . -B build and cmake --build build from the parent application.
Add CONFIG_LLCC68_MAX_PAYLOAD_LENGTH with a default of 128 bytes and a hardware-bounded range of 1..255.
Wire both the C++ and raw C LLCC68 payload buffer constants to the Kconfig value so application builds can tune radio buffer RAM without editing headers.
Rename the fixed-length 100k preset from GMSK to GFSK and expose rx_bandwidth_hz() next to the GfskRxBandwidth enum so applications can report configured bandwidth without carrying driver-specific lookup tables.
Use a longer preamble and 32-bit detector for the 100 kbps fixed 6-byte GMSK profile.
Read RX payloads from the RxStartBufferPointer returned by GetRxBufferStatus. The previous subtract-by-length adjustment could read the previous FIFO slot once the continuous RX buffer advanced, causing duplicate and missing packet IDs on the gateway.
Rename the application-owned LLCC68 devicetree compatible to semtech,llcc68-weihua so Zephyr releases with a native semtech,llcc68 binding can coexist with this custom driver module.
Use the registered semtech vendor prefix and a project-specific device suffix; DT_DRV_COMPAT maps to semtech_llcc68_weihua.
Change the fixed 6-byte GMSK helper default to 434.18 MHz so new GMSK traffic does not share the existing 433.10, 433.45, and 433.90 MHz LoRa channels.
Add a fixed 6-byte 100 kbps GMSK profile matching the health-band telemetry packet, plus FSK packet-status helpers for RSSI and error checks. Expose instantaneous RSSI reads for CCA and image calibration for 430-440 MHz GFSK bring-up.
crosstyan